Google Launches TPU 8tx and TPU 8i Max, Taking Eighth-Generation TPU Lineup to Four Systems in One Year

  • Dispatched: Nov 9, 2026 · 15:38 ET (20:38 UTC)

One-sentence summary: Google on November 9, 2026 unveiled two new eighth-generation TPU systems — TPU 8tx for confidential inference and TPU 8i Max, a dual-chip package with double the HBM bandwidth — marking the first time the company has introduced four TPU systems in a single year and sharpening competition from in-house AI accelerators against Nvidia GPUs.

Verification status: ✓ First-party disclosure (official Google blog, November 9, 2026)

Core Facts & Consensus Delta:

  • Published: November 9, 2026 (official Google blog; earliest verifiable secondary report at 09:42 ET / 14:42 UTC; broadcast at 9:00 a.m. PT / 12:00 ET the same day).
  • TPU 8tx: Built on the same silicon as the TPU 8t training chip and paired with 5th Generation AMD EPYC hosts, it adds hardware-level confidential computing, keeping sensitive data and model weights protected and isolated even while in active use. Using the low-latency Boardfly network from TPU 8i, it delivers up to 2x lower latency than TPU 8t with a near-zero performance penalty.
  • TPU 8i Max: Two TPU 8i chips combined in a single package, doubling compute, on-chip SRAM and HBM bandwidth versus TPU 8i (768MB of SRAM and 17.2TB/s of HBM bandwidth, per TechTarget citing Google), aimed at million-token context windows and multi-agent inference.
  • Baseline: TPU 8t and 8i, launched at Google Cloud Next in April, offer up to 2.7x better training performance and 80% better inference price-performance versus the previous generation.
  • Google says TPUs now serve nearly 100 customers, including frontier labs, trading firms, retailers and universities, none named. No pricing or general-availability date was disclosed; Google told Bloomberg the systems will arrive in 2027.

Supply-Chain & Market Read-Through:

  • In-house ASIC cadence: Four TPU systems in one year shows Google meeting inference and agentic demand through system-level packaging rather than new silicon, a differentiated challenge to Nvidia's general-purpose GPUs, in the same direction as the custom-ASIC supply chain around Broadcom (AVGO) and Marvell (MRVL).
  • Memory demand: TPU 8i Max doubles HBM bandwidth per package to attack the "memory wall," pointing to rising HBM capacity and bandwidth demand from long-context inference, supportive for the HBM and memory supply picture around SK Hynix (KRX: 000660), Samsung Electronics (KRX: 005930), Micron (MU) and SanDisk (SNDK). Because both systems reuse existing silicon, they add no new foundry wafer demand in the near term.
  • AMD angle: TPU 8tx pairs with 5th Generation AMD EPYC hosts, putting AMD CPUs inside Google's confidential-computing TPU configuration.
  • Objectivity note: All performance figures are Google's own claims, not independently benchmarked; with no pricing, availability date or named customers, the actual shipment ramp remains to be seen.

Next Catalysts & Watchpoints:

  • Google's follow-up disclosure of pricing, availability and first customers for both systems (2027 launch window).
  • Nvidia's earnings call after the close on November 17, 2026: management's read on inference compute demand and custom-ASIC competition.
  • Alphabet's Q4 earnings in early 2027: cloud growth and any TPU-related revenue disclosure.

Sources:

Information only, not investment advice.

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